As is well-known in the art, arithmetic logic units often perform data processing in a floating point format. Floating point units can be used to perform high precision arithmetic calculations on real, integer, and BCD integers. Moreover, floating point units can be used to perform conversion of numbers between floating point and integer formats.
According to IEEE standard 754, floating point numbers are divided into three sections or fields: a sign field, an exponent field, and a fraction or mantissa field. Floating point numbers are typically represented in a normalized form, i.e., except for zero, the mantissa is made up of an integer 1 followed by a fraction (1.ffff . . . f) where the integer 1 is implied. Normalization maximizes the number of significant digits that can be represented within a mantissa of a given length.
Often floating point architecture includes shifting units to normalize a result. Typically the shifting units are controlled by a counting unit, which is used to count a number of leading zeros in a preliminary result. Using the information obtained in the counting unit, the shifting unit can then appropriately shift the bits of data to normalize the result, where for each shift of the result to the left, the exponent is decremented by one. However, counting the leading zeros to normalize the result takes time, which consequently, delays obtaining the normalized result.
Thus, there is a need for a floating point unit that allows for normalizing the result without causing a delay in obtaining the result.